library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity data_gen is Port ( clk : in std_logic; d_in : in std_logic_vector(7 downto 0); rate : in std_logic_vector(3 downto 0) ; rs_out : out std_logic); end data_gen; architecture Behavioral of data_gen is signal count : std_logic_vector(8 downto 0) ; signal rs_ck : std_logic ; signal asci_1 : std_logic_vector(7 downto 0) ; signal asci_2 : std_logic_vector(7 downto 0) ; signal sdt : std_logic_vector(22 downto 0) ; signal sft_en : std_logic ; signal sft_count : std_logic_vector(4 downto 0) ; signal sys_count : std_logic_vector(8 downto 0) ; begin clock_gen: process(clk) begin if clk='1' and clk'event then if count ="110011101" then count<="000000000" ; rs_ck<='0' ; else count <= count + 1 ; if count="011001110" then rs_ck<='1' ; end if ; end if ; end if ; end process ; bin_asc_1: process(rs_ck,d_in) begin if rs_ck='1' and rs_ck'event then case d_in(3 downto 0) is when "0000" => asci_1 <="00001100" ; when "1000" => asci_1 <="10001100" ; when "0100" => asci_1 <="01001100" ; when "1100" => asci_1 <="11001100" ; when "0010" => asci_1 <="00101100" ; when "1010" => asci_1 <="10101100" ; when "0110" => asci_1 <="01101100" ; when "1110" => asci_1 <="11101100" ; when "0001" => asci_1 <="00011100" ; when "1001" => asci_1 <="10011100" ; when "0101" => asci_1 <="10000010" ; when "1101" => asci_1 <="01000010" ; when "0011" => asci_1 <="11000010" ; when "1011" => asci_1 <="00100010" ; when "0111" => asci_1 <="10100010" ; when "1111" => asci_1 <="01100010" ; when others => asci_1 <="00000000" ; end case ; end if ; end process ; bin_asc_2: process(rs_ck,d_in) begin if rs_ck='1' and rs_ck'event then case d_in(7 downto 4) is when "0000" => asci_2 <="00001100" ; when "1000" => asci_2 <="10001100" ; when "0100" => asci_2 <="01001100" ; when "1100" => asci_2 <="11001100" ; when "0010" => asci_2 <="00101100" ; when "1010" => asci_2 <="10101100" ; when "0110" => asci_2 <="01101100" ; when "1110" => asci_2 <="11101100" ; when "0001" => asci_2 <="00011100" ; when "1001" => asci_2 <="10011100" ; when "0101" => asci_2 <="10000010" ; when "1101" => asci_2 <="01000010" ; when "0011" => asci_2 <="11000010" ; when "1011" => asci_2 <="00100010" ; when "0111" => asci_2 <="10100010" ; when "1111" => asci_2 <="01100010" ; when others => asci_2 <="00000000" ; end case ; end if ; end process ; rs232_shift: process(rs_ck) begin if rs_ck='1' and rs_ck'event then if sft_en ='1' then if sft_count="11111" then sft_count<="11111" ; else sft_count <= sft_count + 1 ; if sft_count ="00001" then sdt<= "10" & asci_1 & "010" & asci_2 & "01" ; elsif (sft_count >="00010" and sft_count <="10101" ) then sdt <= sdt(21 downto 0) & '0' ; end if ; end if ; else sft_count <= "00000" ; end if ; end if ; end process ; rs_out <= sdt(22) ; rs_232_rate: process(rs_ck,rate) begin if rs_ck='1' and rs_ck'event then if rate=x"0" then sys_count <="000000000" ; sft_en<='0' ; else if sys_count(8 downto 5)=rate then sys_count <="000000000" ; else sys_count <=sys_count + 1 ; if sys_count="000000001" then sft_en<='1' ; elsif sys_count="000100000" then sft_en<='0' ; end if ; end if ; end if ; end if ; end process ; end Behavioral;